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Patent drawing for Method, computer program and apparatus for analysing a programmable logic controller program
US 12,085,911 B2
Control systems US 12,085,911 B2 Not in force

Method, computer program and apparatus for analysing a programmable logic controller program

This invention describes a system that automatically checks for errors in industrial control programs, specifically those written in a common format called Ladder logic. It works by converting the program into a mathematical model, then using a specialized computer program to find any mistakes or unexpected behaviors. If an error is found, the system shows the user exactly where and how the problem occurs within the original program.

Why it matters: Since 2020, SMT solver performance has improved, making complex formal verification of industrial control systems more practical. The increasing complexity and criticality of industrial automation also heightens the need for robust automated program analysis.

Status
Not in forceListed as no longer active. The specific reason is not in the record we hold.
How hard to build
SpecializedFormal verification software, PLC program parsing

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