This invention describes a way to speed up matrix multiplication, a fundamental math operation, inside a computer chip. It uses several specialized calculation units, called MAC units, arranged like an assembly line. Different parts of the matrix multiplication are processed simultaneously in these units, one after another, to complete the overall calculation much faster, with the claims detailing a specific pipelined arrangement of multiple MAC units.
Why it matters: Filed before the widespread adoption of dedicated AI accelerators. The described pipelined matrix multiplication architecture aligns with current hardware trends for accelerating machine learning workloads.
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